JPH0447760U - - Google Patents
Info
- Publication number
- JPH0447760U JPH0447760U JP8993590U JP8993590U JPH0447760U JP H0447760 U JPH0447760 U JP H0447760U JP 8993590 U JP8993590 U JP 8993590U JP 8993590 U JP8993590 U JP 8993590U JP H0447760 U JPH0447760 U JP H0447760U
- Authority
- JP
- Japan
- Prior art keywords
- memory
- control
- circuit
- signal
- dma controller
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Bus Control (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8993590U JPH0447760U (en]) | 1990-08-28 | 1990-08-28 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8993590U JPH0447760U (en]) | 1990-08-28 | 1990-08-28 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0447760U true JPH0447760U (en]) | 1992-04-23 |
Family
ID=31824274
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8993590U Pending JPH0447760U (en]) | 1990-08-28 | 1990-08-28 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0447760U (en]) |
-
1990
- 1990-08-28 JP JP8993590U patent/JPH0447760U/ja active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPH0447760U (en]) | ||
| JPH022751U (en]) | ||
| KR970076252A (ko) | 마이크로컴퓨터 | |
| KR940001160A (ko) | 메모리 번지 데이타를 선행 선택하는 신호처리 구조 | |
| JPS60170850U (ja) | デ−タバツフア | |
| JPS6243407Y2 (en]) | ||
| SU470861A1 (ru) | Логическое полноточное запоминающее устройство | |
| JPS6030872Y2 (ja) | 磁気バブル記憶装置 | |
| KR910006792B1 (ko) | 다이랙트 메모리 억세스 컨트롤러의 억세스 메모리 확장회로 | |
| JPS63163541U (en]) | ||
| JPS6324755U (en]) | ||
| JPH0486941U (en]) | ||
| JPS6214536U (en]) | ||
| JPH0161745U (en]) | ||
| JPH03100341U (en]) | ||
| JPH0358737U (en]) | ||
| JPS60166050U (ja) | プログラム切替可能なメモリ−回路 | |
| JPH02130027U (en]) | ||
| JPH0270252U (en]) | ||
| JPS62154544U (en]) | ||
| JPH0350255U (en]) | ||
| JPH0270249U (en]) | ||
| JPS6184953U (en]) | ||
| JPH0566751U (ja) | 擬似デュアルポートメモリ方式 | |
| JPS5890596U (ja) | ダイナミツクメモリボ−ド |